Barrel shifter


A barrel shifter is a digital circuit that can shift a data word by a specified number of bits without the use of any sequential logic, only pure combinational logic. One way to implement it is as a sequence of multiplexers where the output of one multiplexer is connected to the input of the next multiplexer in a way that depends on the shift distance. A barrel shifter is often used to shift and rotate n-bits in modern microprocessors, typically within a single clock cycle.
For example, take a four-bit barrel shifter, with inputs A, B, C and D. The shifter can cycle the order of the bits ABCD as DABC, CDAB, or BCDA; in this case, no bits are lost. That is, it can shift all of the outputs up to three positions to the right. The barrel shifter has a variety of applications, including being a useful component in microprocessors.

Implementation

A barrel shifter is often implemented as a cascade of parallel 2×1 multiplexers. For an 8-bit barrel shifter, two intermediate signals are used which shifts by four and two bits, or passes the same data, based on the value of S and S. This signal is then shifted by another multiplexer, which is controlled by S:
int1 = IN , if S 0
= IN << 4, if S 1
int2 = int1 , if S 0
= int1 << 2, if S 1
OUT = int2 , if S 0
= int2 << 1, if S 1
Larger barrel shifters have additional stages.

Cost

The number of multiplexers required for an n-bit word is. Five common word sizes and the number of multiplexers needed are listed below:
Cost of critical path in FO4 :
A common usage of a barrel shifter is in the hardware implementation of floating-point arithmetic. For a floating-point add or subtract operation, the significands of the two numbers must be aligned, which requires shifting the smaller number to the right, increasing its exponent, until it matches the exponent of the larger number. This is done by subtracting the exponents and using the barrel shifter to shift the smaller number to the right by the difference, in one cycle. If a simple shifter were used, shifting by n bit positions would require n clock cycles.