The Fredkin gate is a computational circuit suitable for reversible computing, invented by Edward Fredkin. It is universal, which means that any logical orarithmetic operation can be constructed entirely of Fredkin gates. The Fredkin gate is a circuit or device with three inputs and three outputs that transmits the first bit unchanged and swaps the last two bitsif, and only if, the first bit is 1.
Definition
The basic Fredkin gate is a controlledswap gate that maps three inputs onto three outputs. The C input is mapped directly to the C output. If C = 0, no swap is performed; I1 maps to O1, and I2 maps to O2. Otherwise, the two outputs are swapped so that I1 maps to O2, and I2 maps to O1. It is easy to see that this circuit is reversible, i.e., "undoes" itself when run backwards. A generalized n×n Fredkin gate passes its first n-2 inputs unchanged to the corresponding outputs, and swaps its last two outputs if and only if the first n-2 inputs are all 1. The Fredkin gate is the reversible three-bit gate that swaps the last two bits if, and only if, the first bit is 1. It has the useful property that the numbers of 0s and 1s are conserved throughout, which in the billiard ball model means the same number of balls are output as input. This corresponds nicely to the conservation of mass in physics, and helps to show that the model is not wasteful.
The Fredkin gate can be defined using truth functions with AND, OR, XOR, and NOT, as follows: where S = AND C Alternatively:
Completeness
One way to see that the Fredkin gate is universal is to observe that it can be used to implement AND, NOT and OR:
Example
Three-bit full adder using five Fredkin gates. The "g" garbage output bit is if r=0, and if r=1. Inputs on the left, including two constants, go through three gates to quickly determine the parity. The 0 and 1 bits swap places for each input bit that is set, resulting in parity bit on the 4th row and inverse of parity on 5th row. Then the carry row and the inverse parity row swap if the parity bit is set and swap again if one of the p or q input bits are set and the resulting carry output appears on the 3rd row. The p and q inputs are only used as gate controls so they appear unchanged in the output.