Globally asynchronous locally synchronous


Globally asynchronous locally synchronous is an architecture for designing electronic circuits which addresses the problem of safe and reliable data transfer between independent clock domains. GALS is a model of computation that emerged in the 1980s. It allows to design computer systems consisting of several synchronous islands interacting with other islands using asynchronous communication, e.g. with FIFOs.

Details

A GALS circuit consists of a set of locally synchronous modules communicating with each other via asynchronous wrappers. Each synchronous subsystem can run on its own independent clock. Advantages include much lower electromagnetic interference. The CMOS circuit requires relatively large supply current when changing state from 0 to 1. These changes are aggregated for synchronous circuit as most changes are initialised by an active clock edge. Therefore, large spikes on supply current occur at active clock edges. These spikes can cause large electromagnetic interference, and may lead to circuit malfunction. In order to limit these spikes large number of decoupling capacitors are used. Another solution is to use a GALS design style, i.e. design is synchronous but globally asynchronous, i.e. there are different clock signal regimes thus supply current spikes do not aggregate at the same time. Consequently, GALS design style is often used in system on a chip. It is especially used in network on a chip architectures for SoCs.

General