Honeywell 6000 series


The Honeywell 6000 series computers were rebadged versions of General Electric's 600-series mainframes manufactured by Honeywell International, Inc. from 1970 to 1989. Honeywell acquired the line when it purchased GE's computer division in 1970 and continued to develop them under a variety of names for many years.
The high-end model was the 6080, with performance approximately 1 MIPS. Smaller models were the 6070, 6060, 6050, 6040, and 6030. In 1973 a low-end 6025 was introduced. The even-numbered models included an Enhanced Instruction Set feature, which added decimal arithmetic and storage-to-storage operations to the original word-oriented architecture.
In 1973 Honeywell introduced the 6180, a 6000-series machine with addressing modifications to support the Multics operating system. In 1974 Honeywell released the 68/80 which added cache memory in each processor and support for a large directly addressable memory. In 1975 the 6000-series systems were renamed as Level 66, which were slightly faster and offered larger memories. In 1977 the line was again renamed 66/DPS, and in 1979 to DPS-8, again with a small performance improvement to 1.7 MIPS. The Multics model was the DPS-8/M.
In 1989, Honeywell sold its computer division to the French company Groupe Bull who continued to market compatible machines.

Hardware

6000-series systems were said to be "memory oriented" — a system controller in each memory module arbitrated requests from other system components. Memory modules contained 128 K words of 1.2 μs 36-bit words; a system could support one or two memory modules for a maximum of 256 K words. Each module provided two-way interleaved memory.
Devices called Input/Output Multiplexers served as intelligent I/O controllers for communication with most peripherals. The IOM supported two different types of peripheral channels: Common Peripheral Channels could handle data transfer rates up to 650,000 cps; Peripheral Subsystem Interface Channels allowed transfers up to 1.3 million cps.
The 6000 supported multiple processors and IOMs. Each processor and IOM had four ports for connection to memory; each memory module had eight ports for communication with other system components, with an interrupt cell for each port.
Memory protection and relocation was accomplished using a base and bounds register in the processor, the Base Address Register . The IOM was passed the contents of the BAR for each I/O request, allowing it to use virtual rather than physical addresses.
A variety of communications controllers could also be used with the system. The older DATANET-30 and the DATANET 305— intended for smaller systems with up to twelve terminals attached to an IOM. The DATANET 355 processor attached directly to the system controller in a memory module and was capable of supporting up to 200 terminals.

CPU

The CPU operated on 36-bit words, and addresses were 18 bits. The Accumulator Register was 72 bits, or could be accessed separately as two 36-bit registers or four 18-bit registers. An eight-bit Exponent Register contained the exponent for floating point operations. There were eight eighteen-bit index registers X0 through X7.
The 18-bit Base Address Register contained the base address and number of 1024-word blocks assigned to the program. The system also included several special-purpose registers: an 18-bit Instruction Counter and a 27-bit Timer Register with a resolution of 2 μs. Sets of special registers were used for fault detection and debugging.
The EIS instruction set added eight additional 24-bit registers AR0 through AR7. These registers contained an 18-bit word address, a 2-bit address of a character within the word, and a 4-bit address of a bit within the character.

 Address register format:
 1 11 2 2
 0 7 89 0 3
 +-------------------+--+----+
 | Word | C| Bit|
 +-------------------+--+----+

Instruction formats

The 6000-series machine's basic instruction set had more than 185 single-address one-word instructions. The basic instructions were one word. The addresses pointed to operand descriptors which contained the actual operand address and additional information.

 Basic instruction format:
 1 1 2 2 2 2 3
 0 7 8 6 7 8 9 5
 +-------------------+-----------+-+------+
 | Y | OP |I| Tag |
 +-------------------+-----------+-+------+

The EIS instructions were two-word to four-word instructions depending on the specific instruction.

 EIS instruction format:
 1 1 2 2 2 2 3
 word 0 7 8 6 7 8 9 5
 +-------------------+-----------+-+------+
 0 | Variable field | OP |I| MF1 |
 +-------------------+-----------+-+------+
 1 | Operand descriptor 1 or indirect word |
 +----------------------------------------+
 2 . Operand descriptor 2 or indirect word. 
 +- - - - - - - - - - - - - - - - - - - - +
 3 . Operand descriptor 3 or indirect word. 
 +- - - - - - - - - - - - - - - - - - - - +

Multiple levels of indirect addressing were supported. Indirect addresses had the same format as instructions, and the address modification indicated by the tag field of the indirect address was performed at each level.
The tag field of the instruction consisted of a 3-bit tag modifier and a 4-bit tag designator.
For modification types R, RI, and IR the tag designator contains a register to be used for indexing. Other TD values indicated that Y should be used as an immediate operand. Direct addressing was a special case where Y was used as the operand address with no modification.

Data formats

Data was stored in big-endian format. Bits were numbered starting from 0 to 35 or 71.
The following peripherals were available for the 6000-Series machines in 1971.
The primary operating system for the line was the General Comprehensive Operating System, which Honeywell originally inherited from General Electric's GECOS. In 1978 Honeywell introduced a rewritten version GCOS 8, which supported virtual memory. The Multics OS also ran on selected CPU models.
In 1974, Honeywell purchased Xerox Data Systems, and developed a work-alike of the Xerox operating system CP-V as CP-6 to run on DPS-8 systems in order to retain Xerox' loyal customer base.