As in digital-to-analog converters, a binary word is applied to the ladder network, whose N bits are treated as representing an integer value according to the relation: For a conventional DAC or R-2R network, the output signal value would be: In contrast, the logarithmic ladder network discussed in this article creates a behavior as:
Circuit implementation
This example circuit is composed of 4 stages, numbered 1 to 4, and an additional leading Rsource and trailing Rload. Each stage i has a designed input-to-output voltage attenuation ratioi as: For logarithmic scaled attenuators, it is common practice to express their attenuation in decibels: This reveals a basic property: To show that this satisfies the overall intention: The different stages 1.. N should function independently of each other, as to obtain 2N different states with a composable behavior. To achieve an attenuation of each stage that is independent of its surrounding stages, either one of two design choices is to be implemented: constant input resistance or constant output resistance.
Constant input resistance
The input resistance of any stage shall be independent of its on/off switch position, and must be equal to Rload. This leads to: With these equations, all resistor values of the circuit diagram follow easily after choosing values for N, and Rload.
Constant output resistance
The output resistance of any stage shall be independent of its on/off switch position, and must be equal to Rsource. This leads to: Again, all resistor values of the circuit diagram follow easily after choosing values for N, and Rsource.
Circuit variations
The circuit as depicted above, can also be applied in reverse direction. That correspondingly reverses the role of constant-input and constant-output resistance equations.
Since the stages do not influence each other's attenuation, the stage order can be chosen arbitrarily. Such reordering can have a significant effect on the input resistance of the constant output resistance attenuator and vice versa.
Background
R-2R ladder networks used for Digital-to-Analog conversion are rather old. A historic description is in a patent filed in 1955. Multiplying DA-converters with logarithmic behavior were not known for a long time after that. An initial approach was to map the logarithmic code to a much longer code word, which could be applied to the classical R-2R based DA-converter. Lengthening the codeword is needed in that approach to achieve sufficient dynamic range. This approach was implemented in a device from Analog Devices Inc., protected through a 1981 patent filing.