Open-Silicon, a SiFive company is a semiconductor company founded in 2003 to provide traditional ASIC design, derivative and platform SoCs, and production handoffs where Open-Silicon provides manufacturing operations.
Corporate history
Open-Silicon, a SiFive company was founded in 2003 by industry veterans Dr. Naveed Sherwani, Dr. Satya Gupta and Scott Houghton. The idea was to select best-in-class technology from the open market and apply it through an engineering process focused on three goals: low cost, high schedule predictability, and high reliability. Initial funding was provided by Sequoia Capital, Norwest Venture Partners, and InterWest Partners. Additional funding from those partners, and new partners Artis Capital and Bridgescale Partners, brought the total venture funding in four rounds of financing to almost $46M. In December 2007 Unicorn Investment Bank acquired 75% of Open-Silicon for $190M, with the rest of the company employee-owned. In May 2007, Open-Silicon acquired Zenasis Technologies, a maker of processor optimization EDA software. This technology has become the core of Open-Silicon's MAX Technologies. This technology has also been expanded by Open-Silicon to focus on low power design and process variability management. In 2008 and 2009, Open-Silicon received the "Most Respected Private Semiconductor Company" Award from the Global Semiconductor Alliance. In 2009 Open-Silicon acquired design services firm Silicon Logic Engineering. This acquisition has enhanced the company's derivative IC design capabilities. In 2010 the company opened new facilities in Research Triangle Park, North Carolina, and Pune, India, to provide additional support for derivative IC design. In 2012, Open-Silicon acquired and grew substantial design operations in Pakistan and Taiwan. Open-Silicon is a SiFive company now.
Locations
Open-Silicon has the following principal locations:
Open-Silicon has been instrumental in establishing a new semiconductor segment known as the fabless ASIC market. Core to the company is the OpenMODEL, which allows customers to view and make decisions about their ASIC supply chain. In the five years from 2003–2008, Open-Silicon completed more than 100 designs. With its front-end design capabilities growing, Open-Silicon now provides derivative design solutions for the new design-lite industry segment. In 2011, Open-Silicon announced a relationship with Micron to develop derivative IC products for the Micron Hybrid Memory Cube technology and later became a founding member of the Hybrid Memory Cube Consortium.
Products and services
Open-Silicon's business model is called the OpenMODEL. The OpenMODEL gives customers the option of selecting their IP from the open market, with Open-Silicon qualifying and supporting that IP. In addition to IP, Open-Silicon has relationships with multiple foundries and test and packaging suppliers to maximize customer flexibility. As part of the OpenMODEL, Open-Silicon offers a variety of IC design and manufacturing services, including product definition, design engineering, wafer fabrication, packaging and assembly, and test engineering. The company offers ASIC products at 180 nm, 130 nm, 90 nm, 65 nm, 45/40 nm, 28 nm, 16 nm, 14 nm, 7 nm and 5 nm CMOS process nodes from multiple silicon foundries including TSMC, GlobalFoundries, SMIC, and Fujitsu. IP partners include almost all major open market sources. Open-Silicon was the first adopter of Synopsys's IP OEM partner program.
High-speed processor design
Open-Silicon uses the CoreMAX tool, initially acquired from Zenasis Technologies but since expanded, for high-speed processor design. Open-Silicon and partners were able to demonstrate 65 nm processor performance of 1.1 GHz worst case, and 40 nm processor performance of over 2.4 GHz typical case. Open-Silicon created a Center of Excellence for ARM Technology in 2011 to combine all of the various physical design processor hardening and system design efforts into a single organization. In 2012, Open-Silicon further expanded the Center to include architectural analysis and modeling, pre-silicon prototyping, embedded software, co-silicon system design and test, and post-silicon validation. Utilizing both Cadence and Synopsysplace and route tools for processor optimization, in 2012 Open-Silicon was able to achieve 2.2 GHz in 28 nm with an ARM® dual-core Cortex™-A9 and 1.3 GHz for a low-power 40 nm quad-core implementation.
