Tiger Lake (microarchitecture)

Features

• Intel Willow Cove CPU cores
• Intel Xe GPU with up to 96 execution units with some processors using Intel's discrete GPU, DG1
• HEVC 12-bit, 4:2:2 & 4:4:4 fixed-function hardware decoding & VP9 12-bit 4:4:4 fixed-function hardware decoding & AV1 10-bit 4:2:0 fixed-function hardware decoding
• PCI Express 4.0
• Thunderbolt 4
• USB4
• LPDDR5 memory
• New Deep Learning Boost extensions for built-in AI training acceleration in Xeon processors
• A new AVX-512 instruction: Vector Pair Intersection to a Pair of Mask Registers.
• Miniaturization of CPU and motherboard into an M.2 SSD-sized small circuit board
• Indirect branch tracking and shadow stack