Vortex86


The Vortex86 is a computing system-on-a-chip based on a core compatible with the x86 microprocessor family. It is produced by DM&P Electronics, but originated with Rise Technology.

History

Vortex86 previously belonged to SiS, which got the basic design from Rise Technology. SiS sold it to DM&P Electronics in Taiwan.
Before adopting the Vortex86 series, DM&P manufactured the M6117D, an Intel 386SX compatible, 25–40 MHz SoC.

CPU

Vortex86 CPUs implement the IA-32 architecture but which instructions are implemented varies depending on the model. Vortex86SX and the early versions of Vortex86 do not have a floating point unit. Any code that runs on i586 but does not use floating point instructions will run on these models. Any i586 code will run on Vortex86DX and later. Some Linux kernels emulate the FPU on any CPU that is missing one, so a program that uses i586-level floating point instructions will work on any Vortex86 family CPU under such a kernel, albeit more slowly on a model with no FPU. The more advanced models have FPUs that have i686-level instructions, such as fucomi.
Code intended for i686 may fail on some models because they lack a Conditional Move instruction. Compilers asked to optimize code for a more advanced CPU generate code that uses CMOV. Linux systems intended to run on i686 are generally not compatible with these Vortex86 models because the GNU C Library, when built for i686, uses a CMOV instruction in its assembly language strcmp function, which its dynamic loader uses. Hence, no program that uses shared libraries can execute.
Below are the properties of a Vortex86 original CPU reported by the Linux kernel tool /proc/cpuinfo.
Note that this CPU is a later version with an FPU.

processor : 0
vendor_id : SiS SiS SiS
cpu family : 5
model : 0
model name : 05/00
stepping : 5
cpu MHz : 199.978
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu tsc cx8 mmx up
bogomips : 399.95
clflush size : 32
cache_alignment : 32
address sizes : 32 bits physical, 32 bits virtual
power management:

Compatible Components

DM&P maintained an embedded Linux distribution customized to use the SoCs features. Other operating systems are supported depending on the SoC model and may include various RTOS systems like QNX and VxWorks, Linux distributions, FreeBSD or various versions of Microsoft Windows systems like Windows Embedded Compact or Windows IoT.

Versions

Vortex86 original

SiS55x/Rise mP6 or simply Vortex86 – developed by SiS, three integer and MMX pipelines, branch prediction

Vortex86SX

300 MHz, 16 KB Data + 16 KB Instruction L1 cache, no FPU, no L2 cache. Can use both SD and DDR2 RAM

Vortex86DX

600 MHz to 1 GHz, 16 KB Data + 16 KB Instruction L1 cache, FPU, 256 KB L2 cache, 6-staged pipeline. Can address up to 1 GiB DDR2 RAM
The PDX-600 is a version of the Vortex86DX that only differs in the number of RS-232 ports and has no I²C and servo controllers, thus targeting more the embedded than the industrial market. Netbooks similar to the Belco 450R use this chip.
The package is a single 581-pin BGA package.

Vortex86MX

1 GHz, the CPU core itself hardly differs from the Vortex86DX, but according to several sources, the processor does appear to have implemented SIMD multi-media instructions. This version drops conformance to ISA and integrates a GPU and a HD Audio controller, it also integrates a UDMA/100 IDE controller. The consumer grade version is known as the PMX-1000. Current models of the Gecko Edubook use the Xcore86, a rebadge of the Vortex86MX.

Vortex86MX+

This has a 32KB write through 2-way L1 cache, 256KB write through/write back 4-way L2 cache, PCI rev. 2.1 32-bit bus interface at 33 MHz, DDR2, ROM controller, IPC, Fast Ethernet, FIFO UART, USB2.0 Host and ATA controller. The MX+ Adds a VGA controller on chip with shared memory.
The package is a single 720-pin BGA package.

Vortex86DX2

This has a 32KB write through 4-way L1 cache, 256KB write through/write back 4-way L2 cache, PCI rev. 2.1 32-bit bus interface at 33 MHz, DDR2, ROM controller, IPC, VGA, 100 Mbps ethernet, FIFO UART, USB2.0 Host and ATA controller. Enhancements over the DX include more COM ports, 2GB of RAM, and an HD Audio codec, as well as more GPIO pins.
The package is a single 720-pin BGA package.

Vortex86EX

This has a 32KB write through 2-way L1 cache, 128KB write through/write back 2-way L2 cache, PCI-e bus interface, 300 MHz DDR3, ROM controller, IPC, Fast Ethernet, FIFO UART, USB2.0 Host and ATA controller.
The package is a single 288-pin TFBGA-package.

Vortex86DX3

This has a 1.0 GHz dual-core i686-compatible CPU. It has an eight-way 32K I-Cache, an eight-way 32K D-Cache, a four-way 512 KB L2 cache with a write-through or write-back policy, support for up to 2GB of DDR3 RAM, a PCI-e bus interface, 100 Mbps Ethernet, FIFO UART, a USB 2.0 host, integrated GPU, an ATA controller that has an IDE controller, PATA 100 or 2x SD at Primary Channel, and SATA 1.5Gbit/s at Secondary Channel.
The package is a single 720-pin BGA-package.

Vortex86EX2

The EX2 model has two asymmetrical master/slave CPU cores. The master core runs at 600MHz, has 16K I-Cache, 16K D-Cache, and four-way 128 KB L2 cache with a write-through or write-back policy. The slave core operates at 400 MHz and also has 16KB I-Cache, 16KB D-Cache, but has no L2 cache. Both have a built-in FPU. Maximum DDR3 RAM capacity is 2GB. ECC memory is also supported. It is produced using the 65nm manufacturing process and uses the 19x19mm LFBGA-441 package.