The High-level synthesis tool CoDeveloper includes an Impulse C compiler and related function library intended for development of FPGA-based applications. Impulse C is compatible with standard ANSI C, allowing standard C tools to be used for designing and debugging applications targeting FPGAs. The Impulse C compiler accepts a subset of C and generates FPGA hardware in the form of Hardware Description Language files. Impulse C allows embedded systems designers and software programmers to target FPGA devices for C-language application acceleration. Impulse C is distinct from standard C in that it provides a parallel programming model for mixed processor and FPGA platforms. For this purpose, Impulse C includes extensions to C, in the form of functions and datatypes, allowing applications written in standard C to be mapped onto coarse-grained parallel architectures that may include standard processors along with programmable FPGA hardware. The Impulse C tools include hardware/software co-simulation tools as well as C-to-RTL scheduling/optimizing technology used to map application elements to hardware via FPGA logic synthesis tools.
Programming model
Impulse C supports a variant of the communicating sequential processesprogramming model, while remaining compatible with standard C tools such as debuggers and profilers. Impulse C is designed for dataflow-oriented, streaming applications, but is also designed to support alternate programming models including the use of shared memory as a communication mechanism. In an Impulse C streaming application, hardware and software processes communicate primarily through buffered data streams that are implemented directly in hardware. This buffering of data, which is implemented using dual-clock FIFOs generated by the compiler, makes it possible to write parallel applications at a relatively high level of abstraction, without the cycle-by-cycle synchronization that would otherwise be required. Using Impulse C, an application can be partitioned to create a multiple-process implementation that is partitioned into hardware and software components, or implemented entirely within an FPGA device. For example, an image filtering application could be described using Impulse C as a collection of parallel, pipelined processes, each of which has been described using one or more C subroutines. On the software side of the application, for example in an embedded FPGA processor, Impulse C library functions are used to open and close data streams, read or write data on the streams and, if desired, send status messages or poll for results. For processor-to-FPGA communications, stream reads and writes can be specified as operations that take advantage of FPGA-specific, internal or external bus interfaces. On the hardware side of the application, Impulse C library functions and other C statements are compiled to generate equivalent, parallel hardware implementations in the form of synthesizable HDL files. These files are processed by FPGA tools to create FPGA hardware bitmaps. At the heart of the Impulse C streaming programming model are processes and streams. Processes are independently synchronized, concurrently executing segments of an application. Hardware processes are written using a subset of standard C and perform the work of an application by accepting data, performing computations and generating outputs. In a typical application, data flows from process to process by means of buffered streams, or in some cases by means of messages and/or shared memories. The characteristics of each stream, including the width and depth of the generated FIFOs, may be specified in the C application.
Impulse C supports FPGAs from Xilinx and Altera, including their available soft- and hard-core processors the Altera Nios II and Xilinx's MicroBlaze and PowerPC.
